1. Field of the Invention
The present invention relates to a logic diagram processing device and a logic diagram processing method for processing a logic diagram expressing content of monitor and control performed on a device by a monitor and control system.
2. Description of the Background Art
A monitor and control system notifies an operator/observer of information from a device to be monitored such as various sensors of temperature, pressure, position, and the like and controls various devices such as a motor, a valve, a switch, and hydraulic equipment by an operation of the operator/observer, and is used in a wide range of fields such as a power generation plant, a chemical plant, power receiving/distributing equipment, and water supply and sewerage systems.
A typical monitor and control system has a plurality of modules divided by processes, for example, performing transmission/reception of signals to/from a device as an object of monitor and control. By connecting the modules via communication paths, various processes are realized.
The processes of the modules in the monitor and control system are often expressed in a digraph in which input/output directions of signals are indicated by arrows like in a circuit diagram. Concretely, a process of each module is expressed by a combination of a node indicative of a signal process (hereinbelow, also called “operation element”) and a link connecting nodes and indicating the flow of a signal (hereinbelow, also called “signal line”). The processes of modules are conventionally realized in a fixed manner by hardware circuits. However, from the viewpoints of flexibility and cost performance, in recent years, the case that an operation is mounted as a program on the digital computer and is simulated on a digital computer so that and the process can be realized is increasing.
An example of standards of programming languages expressing a process by an operation element and a signal line is, for example, the international standard IEC61131-3. An operation element is written in the FBD (Function Block Diagram) of the international standard, and a process (control logic) expressed by a combination of an operation element and a signal line is expressed by a diagram called a logic diagram.
In recent years, as the scale of a program is becoming large-scaled, maintenance work such as analysis, addition, and editing of an existing program is becoming difficult. This phenomenon similarly occurs also in generation of a logic diagram expressing monitor and control of a monitor and control system. Concretely, since behaviors corresponding to various modes are written in control logic diagrams, control logics tend to be complicated. In addition, since the number of devices to be controlled is large, the number of logic diagrams controlling the devices is also enormous.
On the other hand, in the logic diagrams, control logics of controlling devices having similar characteristics such as devices of a multiple system are similar and, in many cases, there is only a small difference in control logics, signal names, and the like. Consequently, works such as analysis and editing of a target logic diagram are often performed while comparing and collating a plurality of similar logic diagrams.
Conventionally, in the case of comparing and collating a plurality of diagrams, they are printed on paper or displayed on a display device and compared by the eyes. However, in a pictorial representation language such as a logic diagram, in the case where a diagram is generated without copying or the case where, even diagrams are copied, the copy sources are different, layouts are usually different, and it is difficult to find the difference at a glance. When the number of logic diagrams is not only two but is large such as three, four, . . . , it is more difficult to compare and collate them.
The conventional method, therefore, requires long work time for comparison of logic diagrams. There is the possibility of occurrence of a check error and oversight, and the method has a problem that the quality of a control logic generated is low. As described above, in a pictorial representation language such as a logic diagram, there is a challenge to efficiently collate the difference between similar diagrams.
As an example of techniques solving the problem, a technique of expressing a changed part in a circuit diagram is disclosed in Japanese Patent Application Laid-Open No. 05-189508 (1993). A circuit diagram input device disclosed in Japanese Patent Application Laid-Open No. 05-189508 (1993) has an old-version circuit diagram data storage in which data before a change of a part and a signal is stored, a new-version circuit diagram data storage in which data after the change is stored, symbol setting means, change part extracting means, and change part output means.
In the circuit diagram input device described in Japanese Patent Application Laid-Open No. 05-189508 (1993), the change part extracting means compares and collates old-version circuit diagram data and new-version circuit diagram data, and extracts information of a changed part and/or signal as change part data. The change part output means prints or displays each of an old-version circuit diagram and a new-version circuit diagram in which the outer shape of the extracted part and a signal line which is highlighted by a thick line or a dotted line.
However, in the technique, to recognize the highlighted part, a plurality of diagrams has to be displayed and printed. Consequently, display regions by the number of the plurality of diagrams or printing are/is required. As a result, in the case where the number of logic diagrams to be compared is large, a problem occurs such that the diagrams cannot be efficiently compared and collated.